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MIC705/6/7/8 P Supervisory Circuits
MIC705/6/7/8
P Supervisory Circuits
Description
The MIC705/MIC706/MIC707/MIC708 are inexpensive microprocessor supervisory circuits that monitor power supplies in microprocessor based systems. The circuit functions include a watchdog timer, microprocessor reset, power failure warning and a debounced manual reset input. The MIC705 and MIC706 offer a watchdog timer function while the MIC707 and MIC708 have an active high reset output in addition to the active low reset output. Supply voltage monitor levels of 4.65V and 4.4V are available. The MIC705/MIC707 have a nominal reset threshold level of 4.65V while the MIC706 and MIC708 have a 4.4V nominal reset threshold level. When the supply voltage drops below the respective reset threshold level, RESET is asserted.
Pin Configuration
Top View
MR VCC GND PFI 1 2 3 4 8 WDO RESET WDI PFO
MIC705 MIC706
7 6 5
N Package - 8 Lead Plastic DIP Package M Package - 8 Lead Plastic SOIC Package
MR VCC GND PFI
1 2 3 4
8
RESET RESET NC PFO
MIC707 MIC708
7 6 5
Features
* Debounced Manual Reset Input is
Typical Applications
* Automotive Systems * Intelligent Instruments * Critical Microprocessor Power Monitoring * Printers * Computers * Controllers
Ordering Information
Part MIC70_N MIC70_M Package 8-Lead PDIP 8-Lead SOIC Temp. Range -40C to +85C -40C to +85C
* Reset Pulse Width, 200ms * Watchdog Timer, 1.6s (MIC705/MIC706) * 4.4V or 4.65V Precision Voltage Monitor * Early Power Fail Warning or Low Battery
Detect
TTL/CMOS Compatible
Typical Operating Circuit
+5V (Regulated) Manual Reset MR VCC VCC RESET
DC Voltage (Unregulated)
MIC705 MIC706
RESET
P
I/O Line NMI Interrupt
WDI
WDO PFI PFO
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MIC705/6/7/8 P Supervisory Circuits
Absolute Maximum Ratings
Terminal Voltage VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V All Other Inputs . . . . . . . . . . . . -0.3V to (VCC + 0.3V) Input Current VCC, Gnd. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA Output Current (all outputs) . . . . . . . . . . . . . . . . . 20mA Operating Temperature Range MIC70_N, MIC70_M . . . . . . . . . . . . . . . . . -40C to 85C Storage Temperature Range . . . . . . . . . . . . .-65C to 150C Lead Temperature (Soldering - 10 sec.) . . . . . . . . . . . 300C Power Dissipation (PDIP) . . . . . . . . . . . . . . . . . . . . 475mW Power Dissipation (SOIC) . . . . . . . . . . . . . . . . . . . . 400mW
Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. Operating ranges define those limits between which the functionality of the device is guaranteed.
Electrical Characteristics
VCC = 4.75V to 5.5V for MIC705/MIC707, VCC = 4.5V to 5.5V for MIC706/MIC708, TA = -40C to 85C unless otherwise noted. Parameter Operating Voltage Range, VCC Supply Current Reset Voltage Threshold Reset Threshold Hysteresis Reset Pulse Width, tRS RESET Output Voltage ISource = 800A ISink = 3.2mA MIC70--C, ISink = 50A, VCC = 1.4V ISource = 800A ISink = 1.2mA 140 VCC - 1.5V Conditions MIC70-MIC70-MIC705, MIC707 MIC706, MIC708 4.50 4.25 4.65 4.4 40 200 280 Min 1.4 Typ Max 5.5 60 4.75 4.5 Units V A V mV ms V 0.4 0.3 V 0.4 1.6 2.25 sec ns V 0.8 -150 -50 50 A 150 V 0.4
RESET Output Voltage
VCC - 1.5V 1.0
Watchdog Timeout Period, tWD WDI Minimum Input Pulse, tWP WDI Threshold Voltage WDI Input Current VIL = 0.4V, VIH = 80% of VCC VIH, VCC = 5V VIL, VCC = 5V WDI = 0V WDI = VCC ISource = 800A ISink = 1.2mA
50 3.5
WDO Output Voltage
VCC - 1.5V
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MIC705/6/7/8 P Supervisory Circuits
Electrical Characteristics
VCC = 4.75V to 5.5V for MIC705/MIC707, VCC = 4.5V to 5.5V for MIC706/MIC708, TA = -40C to 85C unless otherwise noted. Parameter MR Pull-Up Current MR Pulse Width, tMR MR Input Threshold MR to Reset Output Delay, tMD PFI Input Threshold PFI Input Current PFO Output Voltage ISink = 3.2mA VCC = 5V, ISource = 800A VCC = 5V 1.2 -25 VCC - 1.5V 1.25 0.01 VIL VIH Conditions MR = 0V Min 100 150 0.8 2.0 250 1.3 +25 0.4 nS V nA V Typ 250 Max 600 Units A nS V
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MIC705/6/7/8 P Supervisory Circuits
Pin Functions
Pin No.
Pin Name MR MIC705 MIC706 1 MIC707 MIC708 1 Manual Reset Input forces RESET to assert when pulled below 0.8V. An internal pull-up current of 250A on this input forces it high when left floating. This input can also be driven from TTL or CMOS logic. Primary supply input, +5V. IC ground pin, 0V reference. Power fail input. Internally connected to the power fail comparator which is referenced to 1.25V. The power fail output (PFO) remains high if PFI is above 1.25V. PFI should be connected to GND or VOUT if the power fail comparator is not used. Power fail output. The power fail comparator is independent of all other functions on this device. Watchdog input. The WDI input monitors microprocessor activity, an internal watchdog timer resets itself with each transition on the watchdog input. If the WDI pin is held high or low for longer than the watchdog timeout period, WDO is forced to active low. The watchdog function can be disabled by floating the WDI pin. No Connect RESET is asserted if either VCC goes below the reset threshold or by a low signal on the manual reset input (MR). RESET remains asserted for one reset timeout period (200ms) after VCC exceeds the reset threshold or after the manual reset pin transitions from low to high. The watchdog timer will not assert RESET unless WDO is connected to MR. Output for the watchdog timer. The watchdog timer resets itself with each transition on the watchdog input. If the WDI pin is held high or low for longer than the watchdog timeout period, WDO is forced low. WDO will also be forced low if VCC is below the reset threshold and will remain low until VCC returns to a valid level. RESET is the compliment of RESET and is asserted if either VCC goes below the reset threshold or by a low signal on the manual reset input (MR). RESET is suitable for microprocessors systems that use an active high reset.
VCC GND PFI
2 3 4
2 3 4
PFO WDI
5 6
5 N/A
N/C RESET
N/A 7
6 7
WDO
8
N/A
RESET
N/A
8
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MIC705/6/7/8 P Supervisory Circuits
Block Diagram
VCC 250A MR (1)
VCC (2) 4.65V*
+ -
RESET GENERATOR
RESET (7)
WDO (8)
WDI (6)
WATCHDOG TIMER
PFI (4) 1.25V
+
PFO (5)
-
* 4.4V for MIC706
Figure 1. MIC705/MIC706 Block Diagram
VCC 250A MR (1) RESET (8)
VCC (2) 4.65V*
+ -
RESET GENERATOR
RESET (7)
PFI (4) 1.25V
+
PFO (5)
-
* 4.4V for MIC708
Figure 2. MIC707/MIC708 Block Diagram
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MIC705/6/7/8 P Supervisory Circuits
Circuit Description
Power Fail Warning An additional comparator which is independent of other functions on the MIC705/706/707/708 is provided for early warning of power failure. An external voltage The output of the watchdog timer (WDO) will remain high if WDI sees a valid transition within the watchdog timeout period or if WDI is left floating. If VCC falls below the reset threshold voltage then WDO goes low immediately regardless of WDI. Thus, if WDI is left floating, then WDO can be used as a low line indicator. Microprocessor Reset The RESET pin is asserted whenever VCC falls below the reset threshold voltage or when MR goes low. The reset pin remains asserted for a period of 200ms after VCC has risen above the reset threshold voltage and MR goes high. The reset function ensures the
Unregulated DC
R1 PFI
+
R2 1.25V
-
PFO
Figure 3. Power Fail Comparator
divider can be used to compare unregulated DC to an internal 1.25V reference. The voltage divider ratio on the input of the power fail comparator (PFI) can be chosen so as to trip the power fail comparator a few milliseconds before VCC falls below the maximum reset threshold voltage. The output of the power fail comparator (PFO) can be used to interrupt the microprocessor when used in this mode and execute shut-down procedures prior to power loss. Watchdog Timer The microprocessor can be monitored by connecting the WDI pin (watchdog input) to a bus line or I/O line. If a transition doesn't occur on the WDI pin within the watchdog timeout period, then WDO will go low. A minimum pulse of 50ns or any transition low-to-high or high-to-low on the WDI pin will reset the watchdog timer.
VCC tMR MR tMD RESET WDO tRS
VRT
tRS
Figure 4. Reset Timing Diagram
microprocessor is properly reset and powers up into a known condition after a power failure. RESET will remain valid with VCC as low as 1.4V.
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MIC705/6/7/8 P Supervisory Circuits
Alternate Source Cross Reference Guide
MIC Direct Replacement MIC705N MIC705M MIC705N MIC705M MIC705N MIC705N MIC705M MIC706N MIC706M MIC706N MIC706N MIC706N MIC706M MIC707N MIC707M MIC707N MIC707M MIC707N MIC707N MIC707M MIC708N MIC708M MIC708N MIC708M MIC708N MIC708N MIC708M
Industry P/N MAX705CPA MAX705CSA MAX705EPA MAX705ESA ADM705AN DS1705EPA DS1705ESA MAX706CPA MAX706CSA MAX706EPA ADM706AN DS1706EPA DS1706ESA MAX707CPA MAX707CSA MAX707EPA MAX707ESA ADM707AN DS1707EPA DS1707ESA MAX708CPA MAX708CSA MAX708EPA MAX708ESA ADM708AN DS1708EPA DS1708ESA
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MIC705/6/7/8 P Supervisory Circuits
Packaging Information
M Package, 8-Pin Small Outline
0.197 0.190
Pin 1 Identifier
0.155 0.150
0.244 0.228
0.069 0.053 0.060 0.019 0.013 0.040 0.011 0.004
0.012 0.009 0-81/4
0.050 0.016
N Package, 8-Pin Plastic Dual-In-Line
0.400 0.370
0.260 0.240
0.310 0.290 0.150 0.120
0.035 0.015 0.150 0.125 0.110 0.090
0.023 0.015
0.370 0.300
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